AMD has begun production ramp of its 6th-generation EPYC server processor, codenamed Venice, on TSMC's 2nm (N2) process in Taiwan, making it the first high-performance computing chip in the industry to reach production on the new node. The Zen 6 design scales to 256 cores and delivers up to 1.6 TB/s of memory bandwidth.
AMD claims Venice offers up to a 70% compute performance gain over the current EPYC Turin generation. Beyond Taiwan, the company plans to eventually manufacture the chip at TSMC's Arizona campus and has already teased a follow-on design, Verano, that integrates LPDDR memory for memory-hungry AI workloads.
Venice anchors AMD's Helios rack-scale platform, which pairs the CPUs with Instinct MI450X GPUs and is on track for multi-gigawatt deployments starting in the second half of 2026.